Browse Books

John P. Hayes, a well-known authority in the area of computer engineering, now brings his expertise to digital logic design. Intended as a mainstream introduction for the first course, Introduction to Digital Logic Design provides a presentation which is both scholarly and highly supportive of student learning. In addition, it presents the traditional core topics including sequential and combinational design and register level logic. This is the first introductory text that provides balanced coverage of concepts, techniques and practice. Also, the text includes excellent coverage of the most modern topics and technologies -- programmable logic devices (PLD's), the testability, and computer aided design (CAD). This text has an attractive, practical design that highlights a number of features that support student learning.

Cited By

Huang H and Densmore D (2014). Fluigi, ACM Journal on Emerging Technologies in Computing Systems , 11 :3 , (1-19), Online publication date: 30-Dec-2015 .

El-Bakry H, Atwan A and Mastorakis N A new technique for realization of Boolean functions Proceedings of the 9th WSEAS international conference on Artificial intelligence, knowledge engineering and data bases, (260-270)

Aloul F and El-Tarhuni M PN code acquisition using Boolean satisfiability techniques Proceedings of the 2009 IEEE conference on Wireless Communications & Networking Conference, (632-637)

Aboalsamh H A Boolean algebraic framework for association and pattern mining Proceedings of the 12th WSEAS international conference on Computers, (940-949)

Chavira M and Darwiche A (2008). On probabilistic inference by weighted model counting, Artificial Intelligence , 172 :6-7 , (772-799), Online publication date: 1-Apr-2008 .

Chavira M and Darwiche A Encoding CNFs to empower component analysis Proceedings of the 9th international conference on Theory and Applications of Satisfiability Testing, (61-74)

Wu Q and Hsiao M (2006). A New Simulation-Based Property Checking Algorithm Based on Partitioned Alternative Search Space Traversal, IEEE Transactions on Computers , 55 :11 , (1325-1334), Online publication date: 1-Nov-2006 .

Biswas S, Dwarakanath K and Blanton R Generalized Sensitization using Fault Tuples Proceedings of the 22nd IEEE VLSI Test Symposium

Niemier M and Kogge P Exploring and exploiting wire-level pipelining in emerging technologies Proceedings of the 28th annual international symposium on Computer architecture, (166-177)

Niemier M and Kogge P (2001). Exploring and exploiting wire-level pipelining in emerging technologies, ACM SIGARCH Computer Architecture News , 29 :2 , (166-177), Online publication date: 1-May-2001 .

Han B, Lee S and Yang H (1999). A Model-Based Diagnosis System for Identifying Faulty Components in Digital Circuits, Applied Intelligence , 10 :1 , (37-52), Online publication date: 1-Jan-1999 .

Marques-Silva J and Sakallah K (1999). GRASP, IEEE Transactions on Computers , 48 :5 , (506-521), Online publication date: 1-May-1999 .

Barrett G and Lafortune S (2019). Bisimulation, the Supervisory Control Problem and StrongModel Matching for Finite State Machines, Discrete Event Dynamic Systems , 8 :4 , (377-429), Online publication date: 1-Dec-1998 .

Vishnubhotla S and Ganesan S Computer engineering curriculum at Oakland University Proceedings of the 1996 workshop on Computer architecture education, (9-es)